Electronic coding and decoding device



A ril 9, 1963 P. BURSTOW ELECTRONIC CODING AND DECODING DEVICE Filed Jan. 30, 1959 3 v r c "W N 6 G G G -m F w m M I.\ 3 H r 15 o m w a F U KW.

c 2 L 6 U A I e x F m I 1. K c l l T H T M +3 5 o D L A P x F R." E J FIGA wvzkroe PIEEEE BUIFSTOW Anacwz) United States Patent ELECTRONIC CQDKNG AND DECGDIN G DEVICE Pierre Burstow, Paris, France, assignor to Conipagnie lndustrieile des Telephones, Paris, France, a French corporation Filed Jan. 30, 1959, Ser. No. 790,156 Claims priority, application France Feb. 4, 1958 10 Claims. (Cl. 307-885) The present invention concerns an electronic device for coding and decoding electric signals, which can be used notably in telecommunications for the coding or decoding of telegraphic messages, for computing machines, for statistical machines and for remote control and telemetering.

It is known that in the international telegraph code each character, letter or digit is represented by seven signals: a start signal, which is always negative, five distinctive signals representing the character and a stop signal which is always positive. It is known for the purpose of imparting a secret character to the message to be transmitted to superimpose on each clear signal given by the teleprinter or by the perforated tape a random signal given by the reading of a random perforated tape, the coding methods being carried out by electromechanical devices which require very precise adjustment.

The object of the present invention is to provide a coding device operating by a purely electronic method which comprises no moving parts and is therefore more reliable and more rapid.

The present invention concerns a Coding and decoding device characterized by the fact that it comprises two saturable magnetic cores arranged as magnetic amplifiers, on which are wound at least one power winding, two control windings and a bias winding, and two circuit branches, each of which comprises one of the power wind ings in series with a rectifier, the two circuit branches being connected in parallel to a transistor, the power windings being connected in opposition so that the two cores are not simultaneously saturated, the control wind ings of the magnetic cores being connected in series in two groups to which the two signals to be multiplied are respectively applied, and the resultant signal being received at the output of the transistor.

The coding according to the invention is eifected by multiplication of a clear signal with a random signal, the sign of the product being given by the rule of the multiplication of the signs.

Further features and advantages of the invention will become apparent from the description hereinafter given with reference to the figures of the accompanying drawings, which show by way of example one constructional form of the device according to the invention, and in which:

FIGURE 1 shows the curve of the output current of the device according to the invention,

FIGURE 2 shows diagrammatically a circuit arrange- -ment of the device according to the invention which permits of obtaining the curve according to FIGURE 1,

FIGURE 3 is a curve of the output current of the magnetic amplifier No. 1,

FIGURE 4 is a curve of the output current of the magnetic amplifier No. 2,

FIGURE 5 shows the form of the resultant current with the transistor, and

FIGURE 6 diagrammatically illustrates a multiplication of a number of signals having different signs.

It has been seen that the coding method is such that the sign of the signal sent is the product of the signs of the two component signals: the clear signal and the random signal. The rule of the multiplication of the signs is summarised in the following table, in which the signs of the first column correspond to the signs of the clear signals, those of the second column to the signs of the random signals and those of the third column to the signs actually set:

signal received random signal If now a current 0' (zero) is made to correspond to the s gnal and a current I to the sign the equalities of the rule of the signals (1) give rise to the following four relations:

( X (l) X The device according to the invention satisfies these four relations and resolves the problem of coding by multiplication of the signs. The curve of its output current is shown in FIGURE 1. In this figure, there extends along the abscissae an axis 3 0;: calculated positively from 0 to x, and negatively from 0 to y, and along the ordinates an axis 01 If it is agreed, for example, that the values of the first column of the table of relations (2) correspond to values of x calculated along the axis Ox, that the values of the second column of the table of relation-s (2) correspond to values of y calculated along the axis 0y, and that the values of the third column correspond to ordinate values along 01 it will readily be seen that all the relations (2) are satisfied. Thus, if the first of the relations (2) (O) (I) (I) is considered, (0) must be plotted along 0x: this point therefore coincides with the origin 0. (I) must be plotted along 0y: the end of a vector DE=I is at E and the resultant of the axes 0x, 0y is 0E. The ordinate of the curve P corresponding to the abscissa GE is E F=I, which fullyconfirms the first relation.

If a similar procedure is adopted for the second relation (I) (0)- (I), (I) is to be plotted along 0x: the end of a vector; AB=I is at B (0) must be plotted along 0y: this point therefore coincides with the origin 0, and the resultant of the axes Ox, 0y is 0B The ordinate of the curve P corresponds to the abscissa 0B and B C=I, Which fully verifies the second relation.

Similarly, we have for the third relation:

(0) plotted along the axis 0x coincides with the origin 0, (0) plotted along the axis 0y coincides with the origin 0, and the resultant of 0x and ()y is the origin 0.

Finally, we have for the fourth relation:

(I) plotted along the axis O x is located at (B (I) plotted along the axis 0y is located at 0E of which the resultant is the point 0* (origin), the two vectors 013 and GE; being equal and opposed, which verifies the fourth relation.

It will be seen that the curve P verifying the four relations (2) solves the problem posed of multiplying the clear signal= 3 signs of the signals if, for example, the clear signal is considered along x, the random signal along 0y and the transmitted signal along O l The curve P is obtained with the circuit arrangement shown in FIGURE 2.

The circuit arrangement of the device according to the invention (FIGURE 2) consists of two saturable magnetic cores T and T having a rectangular hysteresis loop and each comprising four windings: the windings 1 and III through which a direct current can be passed are the control windings, the windings IV are bias windings and also have direct current flowing therethrough, and the windings II are the power windings, which are connected on the one hand to the points G and H respectively and on the other hand through rectifiers Rd and R41 respectively to a common point K. The points G and H can be connected to dilIerent alternating current sources which may or may not be out of phase with respect to one another or may be connected to a common alternating-current source. The free ends G and H of the alternating-current sources may be connected to a common point. The power windings II are connected to the sources in inverse senses, the input of the winding II of T being connected to the source G, while the source H is connected to the output 8 of the winding II of T so that the fluxes produced are in opposite directions and the cores T and T are therefore not simultaneously saturated. The control windings 1 of the two cores T and T are connected in series, the output of one being connected to the input of the other, and they form the control winding x. The same is the case with the control windings III, which form the control winding y. However, the flux produced by the winding 1 on each core T or T is in opposition to the flux produced by the winding III. The common point K is connected on the one hand through a resistance r to the negative terminal of a direct-voltage source U and on the other hand to the emitter of a transistor TR, of which the collector is connected through a load resistance R to the negative terminal of a direct-voltage source U the base of the transistor being connected in turn to the negative terminal of a direct-voltage source U and the transistor being of the p-n-p-type. A filtering condenser Ca is connected between the base and the collector of the transistor. The positive terminals of the sources U U and U may be connected to the same common point as the points G and H of the alternating-current sources.

The point K common to the two branches GK and HK receives at each instant the sum of the currents flowing in the two branches. However, the transistor TR is conductive only at potential values of the point K which are positive in relation to the potential of the base. If I is the threshold value of the current across the resistance r at which the transistor becomes conductive, this value is defined by:

that is,

The current then observed in the collector of the transistor substantially follows the variations of the current in the emitter as long as the voltage of the collector remains lower than that of the base, but as soon as the voltage of the collector, defined by: U '+RI (I being the current at the collector and R the load resistance) becomes equal to that of the base, the current I in the collector is stabilised; this is the saturation value I defined by:

that is,

Considering now the current curves of FIGURES 3 and 4, the curve Q (FIGURE 3) is that of the output current passing across the rectifier Rd into the amplifier T when the bias ampere-turns of the winding IV are increased. It will be seen that for a certain value M of the bias ampere-turns NcIc, the current suddenly changes from a low value to a high, substantially constant value. The curve R (FIGURE 4) is that of the output current flowing across the rectifier Rd into the amplifier T, when the bias ampere-turns of the winding IV are decreased. It will be seen that for a certain value M of the bias ampere-turns NcIc, the current suddenly changes from a low value to a high, substantially constant value.

If it is arranged that the value of the ampere-turns ()M is symmetrical with respect to 0M the resultant curve of the curves Q and R is the curve S of FIGURE 5, which is obtained by adding them together. The resultant current is considered at the point K before the transistor. For example, if at a given instant the resultant control ampere-turns of the two cores T and T assume the value y=0N, the resultant output current assumes the value I =N T. It is to be noted that with zero resultant ampereturns, the output current is not zero, but is equal to I and that this value I is maintained very substantially constant betweent the ampere-turns values between the points M and M If it is desired that the value I of the output current at the point K ahead of the transistor should be the minimum value at which the transistor becomes conductive, the output current at the collector of the transistor will assume a value I 0 when the output current at the point K assumes a value 1 I In other words, there corresponds to a current I at the point K ahead of the transistor (FIGURE 5) the output current I =0 (of FIGURE 1) of the collector. I is therefore the threshold value already defined in the description of FIG- URE 2. When the current 1;; at the point K increases, the current at the collector also increases to a constant saturation value I represented in FIGURE 5 by the dashdotted parts S It will be seen that the output current at the point K (parts S and S is then substantially different from the current at the collector (part S The curve of FIGURE 1 is therefore readily obtained from the curve of FIGURE 5 by making l =I -I and by joining the parts S to the curve S, this curve being the curve of the current across the load resistance R at differ ent values of the control ampere-turns, the value of I being ITI0.

The operation of the device just described is as follows: It will be assumed that the current in the control windings x can assume two values, namely a zero value and a constant value I. The same will be assumed in the case of the windings y," but the values 0 and I taken in these windings are taken at random, and therefore independently of the values taken by x. For example, the clear signals are passed through the control windings x, and random signals are passed through control windings y. In addition, a random signal simultaneously corresponds to a clear signal. The resultant coded signal is represented by the output current flowing across the load resistance R when the control windings x and y are each under the influence of a signal. The control windings x and y can assume only one of the four values shown in FIGURE 1 for which the coded signal can assume only two different values, namely a zero value or a constant current value I.

It would be possible, instead of transmitting the signal which passes through the load resistance R, to use it again in one or more control windings such as x which, however, form part of another device in which the signal could again be multiplied by another signal such as y. A second output signal would be obtained, which could in turn be applied to a third device, and so on. It is thus possible to obtain a product of a plurality of signs as illustrated by way of example in FIGURE 6. It is assumed in FIGURE 6 that the four signals are multiplied, the result of which is With the device according to the invention, the multiplication of the first two signs gives (arrow h). This first product is multiplied by the third sign, which is and gives a result (arrow f This second product is multiplied by the fourth sign, which is (i), and gives a result (arrow f It is obviously possible without departing from the scope of the invention to employ an n-p-n-transistor and a correlative change of the polarities, or to increase or reduce the number of control windings. Moreover, the same device which is employed in the transmission of the signal can be used for the reception. In this case, it is sufficient to pass the received signal through the control winding (x) of the receiving device and to pass the corresponding random signal synchronously therewith through the control winding y in order to obtain the desired clear signal in the load resistance of the receiving device. The decoding of the signals is thus eflEected by a device identical to that employed for the coding. A single device can therefore be used for the coding at transmission and the decoding at reception.

I claim:

1. Electronic device for coding and decoding electric signals to multiply a clear signal with a random signal, the sign of the product being given by the rule of the multiplication of the signs, comprising two saturable magnetic cores arranged in the form of a magnetic amplifier, each core being provided with a plurality of windings wound thereon including at least one power winding fed by a separate source of alternating current, two control windings and a bias winding, and two circuit. branches, each of Whichcomprises one of the power windings in series with a rectifier, the two circuit branches being efiectively connected in parallel with respect to a transistor, the power windings being connected in opposition in such manner that the two cores are not simultaneously saturated, one of the two control windings of one of the magnetic cores being connected in series with another core of the control windings of the other magnetic core in two groups, to which the two signals to be multiplied are respectively applied, and the resultant signal of the multiplication of the signals being present at the output of the transistor.

2. Device according to claim 1, wherein in the first branch the input of the power winding is connected to an alternating-current source and the output is connected to one terminal of one of the rectifiers, while in the second branch the output of the power winding is connected to the said source or to a difierent alternating-current source and the input is connected to one terminal of the second rectifier in such manner that, for a given half-cycle of the alternating current, the magnetic fields due to the power currents in the two cores are not of like direction.

3. Device according to claim 1, wherein the control windings of the two saturable cores are connected in series in pairs, the output of one winding of the first core being connected to the input of the second winding, and each group of windings tending to produce in a common core control ampere-turns which are in opposition to one another so that the fluxes cancel out one another in the two cores when current simultaneously flows through the two groups of windings.

4. Device according to claim 1, wherein the bias imparted to the first core is such that, since the point of rise of the output current occurs only with a certain number of positive control ampere-turns, the bias imparted to the second core is such that the point of rise of the output current occurs only with control ampere-turns exactly symmetrical with those of the first.

5. Device according to claim 1, wherein the point common to the two circuit branches is connected on the one hand to the emitter of a transistor and on the other hand to a negatively biased resistance, the base of the transistor being connected to the negative pole of one direct-current source and the collector of the transistor being connected to the negative terminal of another direct-current source.

6. An electronic device for multiplying two signals with each other, the sign of the product being given by the rules of multiplication, comprising two magnetic amplifiers, each having a saturable magnetic core and a plurality of windings wound thereon including at least one power winding, two control windings and a bias winding, a first circuit including the power winding of one of said magnetic amplifiers and rectifier means for rectifying the current flowing therethrough, a second circuit including the power winding of the other magnetic amplifier and rectifier means for rectifying the current flowing therethrough, means having input means and output means and operative to produce in said output means one of two signals representative of the sign of the product,

.said first circuit and said second circuit being efiectively connected in parallel to said input means, said two power windings being effectively connected in opposition in the respective one of said first and second circuits to prevent simultaneous saturation of the corresponding saturable magnetic cores, and means for energizing said control -Winding with said two signals including means for applying one of said two signals to one control winding each of said two magnetic amplifiers and further means for applying the other of said two signals to each of the other control windings of said two magnetic amplifiers.

7. An electronic device for multiplying two signals with each other, the sign of the product being given by the rules of multiplication, comprising two magnetic amplifiers, each having a saturable magnetic core and a plurality of windings wound thereon including at least one power winding, two control windings and a bias winding, a first circuit including the power winding of one of said magnetic amplifiers and rectifier means for rectifying the current flowing therethrough, a second circuit including the power winding of the other magnetic amplifier and rectifier means for rectifying the current flowing therethrough, means having input means and output means and operative to produce in said output means one of two signals represenative of the sign of the product, said first circuit and said second circuit being efiectively connected in parallel to said input means, said two power windings being effectively connected in opposition in the respective one of said first and second circuits to prevent simultaneous saturation of the corresponding saturable magnetic cores, means for supplying to said first and second circuit alternating-current voltages, and means for energizing said control winding with said two signals including means for applying one of said two signals to one control winding each of said two magnetic amplifiers and further means for applying the other of said two signals to each of the other control windings of said two magnetic amplifiers.

8. An electronic device for multiplying two signals with each other, the sign of the product being given by the rules of multiplication, comprising two magnetic amplifiers, each having a saturable magnetic core and a plurality of windings wound thereon including at least one power winding, two control windings and a bias winding, 2. first circuit including the power winding of one of said magnetic amplifiers and rectifier means for rectifying the current flowing therethrough, a second circuit including the power winding of the other magnetic amplifier and rectifier means for rectifying the current flowing therethrough, means having input means and output means and operative to produce in said output means one of two signals representative of the sign of the product, said first circuit and said second circuit being effectively connected in parallel to said input means, said two power windings being effectively connected in opposition in the respective one of said first and second circuits to prevent simultaneous saturation of the corresponding saturable magnetic cores, the two control windings of a respective magnetic amplifier being wound on the corresponding saturable magnetic core to produce therein mutually opposite fluxes, and means for energizing said control winding with said two signals including means for applying one of said two signals to one control winding each of said two magnetic amplifiers and further means for applying the other of said two signals to each of the other control windings of said two magnetic amplifiers.

9. An electronic device for multiplying two signals with each other, the sign of the product being given by the rules of multiplication, comprising two magnetic amplifiers, each having a saturable magnetic core and a plurality of windings wound thereon including at least one power winding, two control windings and a bias winding, a first circuit including the power winding of one of said magnetic amplifiers and rectifier means for rectifying the current flowing therethrough, a second circuit including the power winding of the other magnetic amplifier and rectifier means for rectifying the current flowing therethrough, means having input means and output means and operative to produce in said output means one of two signals representative of the sign of the product, said first circuit and said second circuit being eifectively connected in parallel to said input means, said two power windings being eifectively connected in opposition in the respective one of said first and second circuits to prevent simultaneous saturation of the corresponding saturable magnetic cores, means for supplying to said first and second circuit different alternating-current voltages, and means for energizing said control winding with said two signals including means for applying one of said two signals to one control winding each of said two magnetic amplifiers and further means for applying the other of said two signals to each of the other control windings of said two magnetic amplifiers.

10. An electronic device for multiplying two signals with each other, the sign of the product being given by the rules of multiplication, comprising two magnetic amplifiers, each having a saturable magnetic core and a plurality of windings wound thereon including at least one power winding, two control windings and a bias winding, a first circuit including the power winding of one of said magnetic amplifiers and rectifier means for rectifying the current flowing therethrough, a second circuit including the power winding of the other magnetic amplifier and rectifier means for rectifying the current flowing therethrough, transistor means having input means and output means and operative to produce in said output means one of two signals representative of the sign of the product, said first circuit and said second circuit being effectively connected in parallel to said input means, said two power windings being effectively connected in opposition in the respective one of said first and second circuits to prevent simultaneous saturation of the corresponding saturable magnetic cores, the two control windings of a respective magnetic amplifier being wound on the corresponding saturable magnetic core to produce therein mutually opposite fluxes, means for supplying to said first and second circuit dilferent alternating-current voltages, and means for energizing said control winding with said two signals including means for applying one of said two signals to one control winding each of said two magnetic amplifiers and further means for applying the other of said two signals to each of the other control windings of said two magnetic amplifiers.

References Cited in the file of this patent UNITED STATES PATENTS 2,229,950 Werner Jan. 28, 1941 2,695,993 Haynes Nov. 30, 1954 2,809,303 Collins Oct. 8, 1957 2,846,667 Goodell Aug. 5, 1958 

1. ELECTRONIC DEVICE FOR CODING AND DECODING ELECTRIC SIGNALS TO MULTIPLY A CLEAR SIGNAL WITH A RANDOM SIGNAL, THE SIGN OF THE PRODUCT BEING GIVEN BY THE RULE OF THE MULTIPLICATION OF THE SIGNS, COMPRISING TWO SATURABLE MAGNETIC CORES ARRANGED IN THE FORM OF A MAGNETIC AMPLIFIER, EACH CORE BEING PROVIDED WITH A PLURALITY OF WINDINGS WOUND THEREON INCLUDING AT LEAST ONE POWER WINDING FED BY A SEPARATE SOURCE OF ALTERNATING CURRENT, TWO CONTROL WINDINGS AND A BIAS WINDING, AND TWO CIRCUIT BRANCHES, EACH OF WHICH COMPRISES ONE OF THE POWER WINDINGS IN SERIES WITH A RECTIFIER, THE TWO CIRCUIT BRANCHES BEING EFFECTIVELY CONNECTED IN PARALLEL WITH RESPECT TO A TRANSISTOR, THE POWER WINDINGS BEING CONNECTED IN OPPOSITION IN SUCH MANNER THAT THE TWO CORES NOT SIMULTANEOUSLY SATURATED, ONE OF THE TWO CONTROL WINDINGS OF ONE OF THE MAGNETIC CORES BEING CONNECTED IN SERIES WITH ANOTHER CORE OF THE CONTROL WINDINGS OF THE OTHER MAGNETIC CORE IN TWO GROUPS, TO WHCH THE TWO SIGNALS TO BE MAGNETIC CORE IN TWO GROUPS, TO WHICH THE TWO SIGNALS TO BE MULTIPLIED ARE RESPECTIVELY APPLIED, AND THE RESULTANT SIGNAL OF THE MULTIPLICATION OF THE SIGNALS BEING PRESENT AT THE OUTPUT OF THE TRANSISTOR. 